In this talk, I will describe the opportunities and challenges for architecture research in the context of intelligent embedded computing. I will start by introducing some future embedded computing applications that point to two key trends: (a) the need for intelligence in smaller and smaller form factors is growing rapidly and (b) the power constraints on these devices are also getting more and more stringent. In order to address these seemingly opposing trends, I will then outline the need to research and develop end-to-end domain-specific heterogeneous architectures. Such architectures have the potential to improve the performance/power efficiency significantly over traditional architectures, but they also introduce a host of challenges related to scheduling and management, programmability and consistency in HW/SW support. In this talk, I will describe some of the work we have been doing to address these issues and outline a direction for future research in these areas. I will also describe challenges in evaluation infrastructure and tools that need to be overcome with some examples. Overall, this talk will describe the intersection of architecture and embedded computing research in this new era of intelligent devices.
Tuesday, January 22, 2013
Free and open to the public