"Physical Design Challenges in Advance Nodes." 28nm and 16nm design nodes provide improved performance and power characteristics, but present a new set of challenges for designers. This presentation will cover increasing complexity of designs, higher frequency requirements while underlying physics are the same, as well as the need for lowering power. More is asked from manufacturing technology, EDA tools, and ingenuity of Engineers to make the next generation chips a reality.
Wednesday, November 05, 2014
All ECE and CS students and faculty are invited to attend.