Multi-threshold CMOS (MTCMOS) technology provides low leakage and high performance operation by utilizing high speed, low Vth transistors for logic cells and low leakage, high Vth devices as sleep transistors. Sleep transistors disconnect logic cells from the supply and/or ground to reduce the subthreshold conduction leakage currents in the sleep mode. One of the downsides of MTCMOS technique is the energy consumed during repeated transitions between the sleep and active modes of the circuit operation.
In my talk I will present a charge recycling MTCMOS technique that cuts the energy consumption for mode transitions in half while preserving the wakeup delay and reducing the ground bounce level in the target circuit. Tradeoffs related to the energy saving and leakage power increase of the charge-recycling vs. conventional MTCMOS will be discussed and related circuit optimization problems will be presented. I will conclude my talk by describing the application of the charge-recycling MTCMOS technique to row-based standard cell layouts.