Continuous-time Delta Sigma Modulators with Improved Linearity and Reduced Clock Jitter Sensitivity

Thursday, February 28, 2013
6:00 PM
Free and open to the public

Conventional continuous-time modulators that use non-return-to-zero (NRZ) feedback DACs suffer from distortion due to inter-symbol-interference (ISI) and are sensitive to clock jitter. Using a return-to-zero (RZ) DAC solves the problem of ISI, but exacerbates clock jitter sensitivity. The clock jitter sensitivity of an NRZ DAC can be reduced using a switched-capacitor (SC) DAC, but the large peak-to-average ratio of the DAC waveform degrades modulator linearity. In this work, we introduce the Switched-Capacitor Return-to-Zero (SCRZ) DAC, which combines the low clock jitter sensitivity of the SC DAC with the low distortion of an RZ DAC. Measured results from a test chip fabricated in 0.18um CMOS demonstrate the efficacy of the SCRZ technique.

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Shanthi Pavan

Indian Institute of Technology-Madras

Shanthi Pavan obtained the B.Tech degree in Electronics and Communication Engg from the Indian Institute of Technology, Madras in 1995 and the M.S and Sc.D degrees from Columbia University, New York in 1997 and 1999 respectively. From 1997 to 2000, he was with Texas Instruments in Warren, New Jersey, where he worked on high speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, California. Since July 2002, he has been with the Indian Institute of Technology-Madras, where he is now a Professor of Electrical Engineering. His research interests are in the areas of high speed analog circuit design and signal processing.

Dr.Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the Shanti Swarup Bhatnagar Award and the Swarnajayanthi Fellowship (from the Government of India) , the Young Faculty Recognition Award (from IIT Madras for excellence in teaching), the Technomentor Award from the India Semiconductor Association (2010). He is the Editor-in-Chief of the IEEE Transactions on Circuits and Systems: Part I - Regular Papers. He is a Fellow of the Indian National Academy of Engineering.