Driven by ever-increasing application demands, the energy expended per A/D conversion has been reduced substantially over the last decade. This presentation will survey the most recent trends and will investigate energy limits as they apply to A/D converter architectures commonly employed in fine-line CMOS technology (Flash, Pipeline, SAR and Oversampling Converters). Through this analysis, opportunities for further improvements will be identified and discussed in detail,specifically emphasizing the impact of technology scaling.
Wednesday, August 29, 2012
Free and open to the public