Imaging, broadly defined, is finding a growing number of applications in the automotive, surveillance, tactical, medical diagnostic, industrial, and instrumentation areas. For example, in automotive applications, image sensors can add safety features such as lane departure warning systems, intelligent airbag deployment, and night vision. Image sensors have also enabled biomedical diagnostic devices such as tomographic imaging, gene expression, and camera pills.
The imaging systems required for these emerging applications are fraught with challenges, mainly due to limitations in the readout circuits. Many of these applications require imaging of scenes with fast moving objects with high intrascene variations in irradiance and suffer from undesirable scene disturbances, for example, due to reflection from the sun or laser jamming. In several other applications the target is occasionally obscured by a large background signal, for example, due to tissue auto-uorescence, which necessitates very high readout accuracy. Such impediments require extremely high-performance transducers, readout circuitry, and real-time processing; a goal which CMOS imaging ICs promise to provide.
In this talk I will describe my work under DARPA Vertically Integrated Sensor Array program, in which signal processing techniques are used to relax the demands on the analog circuits in order to meet the stringent performance requirements of the imaging systems in tactical applications. Two different designs will be presented which demonstrate more than an order of magnitude performance improvement in speed, dynamic range (DR) and signal-to-noise ratio (SNR) specifications:1) A high dynamic range high speed image sensor targeted for 3D-IC implementation fabricated in a 0.18åµm CMOS process. Dynamic range is extended using synchronous self-reset while high SNR is maintained via multiple non-uniformly spaced captures and least-squares fit. The prototype achieves 138dB dynamic range and 62dB peak SNR at 1000 frames/sec with energy consumption of 25.5nJ per pixel readout. These results demonstrate four orders of magnitude improvement in dynamic range and speed over the state-of-the-art systems.2) A per-pixel background subtraction circuit, in which charge packets controlled by a pulse frequency modulation signal are subtracted from each pixel‰Ûªs integrator. A 16 ÌÑ1 array of 30åµm pixels prototyped in a 0.18åµm CMOS process achieves noise, linearity, and spatial current variation of 175ppm, 270ppm, and 3%, respectively, at 43 frames/s. Temporal and spatial variations are at least 17 and 5 times lower, respectively, than that of recently published work. In conclusion, an overview of the future possibilities for CMOS sensors in consumer electronic, automotive, surveillance, and biomedical applications will be discussed.