Chip design is radically changing. This period of change is a very exciting time in integrated circuit and system design. On one hand, cross-layer design approaches need to be invented to improve system performance despite CMOS scaling slowdown. On the other, a variety of emerging devices are lined-up to extend or potentially surpass the capabilities of CMOS technology, but require key innovations at the integration, circuits and system levels. This lecture describes how monolithic integration of photonic links can revolutionize the VLSI chip design, dramatically improving its performance and energy-efficiency. Limited scaling of both on-chip and off-chip interconnects, coupled with CMOS scaling slowdown have led to energy-efficiency and bandwidth density constraints that are emerging fast as the major performance bottlenecks in embedded and high-performance digital systems. While optical interconnects have shown promise in extensive architectural studies to date, significant challenges need to be overcome both in device and circuit design as well as the integration strategy. We illustrate how our cross-layer approach guides the system design by connecting process, device and circuit optimizations to system-level metrics, exposing the inherent trade-offs and design sensitivities. Our experimental platforms demonstrate the technology potential at the system level and provide feedback to modeling and device design. In particular, we’ll describe the recent breakthroughs in monolithic photonic memory interface platform with fastest and most energy-efficient modulators demonstrated in a 45nm process node. Based on these design principles and technology demonstrations, we project that in the next decade tailored hybrid (electrical/optical) integrated systems will provide orders of magnitude performance improvements at the system level and revolutionize the way we build future VLSI systems. Moreover, just like integrating the inductor into CMOS at the end of 1990s revolutionized the RF design and enabled mobile revolution, integration of silicon-photonic active and passive devices with CMOS is greatly positioned to revolutionize a number of analog and mixed-signal applications – low-phase noise signal sources and large bandwidth, high-resolution ADCs, to name a few.
Wednesday, November 13, 2013
Free and open to the public