New Materials, Devices, and Architectures for Advancing Computation in the Post-Silicon Era

Seminar
Monday, March 05, 2018
11:00 AM to 12:00 PM
EER 1.504
Free and open to the public

Silicon Complementary-Metal-Oxide-Semiconductor (CMOS) technology underpins the hardware backbone for most computing functions to-date. However, in response to the growth of data-intensive analytic applications and the demand for greater processing power at reduced energy consumption, a dramatic shift in the computing paradigm beyond silicon CMOS is expected, which will be jointly fueled by material discovery, new device design, and innovative system architectures. In this regard, I will discuss two emerging device and material technologies.

The first part of the talk will address the remarkable recent progress in III-V channel MOSFET technology and its candidature as a drop-in replacement for silicon CMOS front-end microelectronics. I will describe the key enabling technology, the monolithic integration, new insights related to the quasi-ballistic electron transport, and the demonstration of record performing III-V metal-oxide-semiconductor-field-effect-transistors (MOSFETs) fabricated at MIT as part of my Ph.D. research.

The second part of the talk will depart from conventional CMOS approaches and introduce the use of oxide electronics for neuromorphic information processing. Using the insulator-metal transition (IMT) effect in in transition-metal oxides as an example, I will discuss the construction of an artificial integrate-and-fire neuron through a feedback-engineering of the intrinsic properties of IMT materials.

I will also describe the development of a complete electro-thermal device model for devices based upon the metal-to-insulator effect that accurately predicts the experimental performance of emerging devices such as artificial neurons and threshold selector switches (for emerging memory), and establishes the performance limits as well as design guidelines for such devices. Finally, by combining fundamental material and device understanding with new computing algorithms and non-classical computer architectures, I will outline some thoughts for future research directions in energy-efficient neuromorphic computing.

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Speaker

Jerome Lin

Jerome Lin

Postdoctoral Fellow
Argonne National Laboratory

Jerome Lin is a postdoctoral fellow in Argonne National Laboratory and the University of Chicago. He received a PhD degree in Electrical Engineering from MIT (2015); and the M.Eng.(2009) and B.Eng. (2007) degrees in Electrical Engineering from National University of Singapore. His research focuses on the application of new materials and devices for future energy-efficient computing. His PhD thesis research investigated the potential of III-V compound semiconductors as the channel material for scaled high performance logic transistors. His postdoctoral research was on nanoscale oxide electronic devices for new memory technology and neuromorphic computing applications. In 2012 and 2013, he was a summer research intern in IBM T.J. Watson Research Center. He has published over 30 research articles, and has received several awards including the IEEE Roger A. Haken Best Student Paper Awards in IEDM respectively in 2008 and 2014, the IEEE Paul Rappaport Best Paper Award in Transactions on Electron Device 2008, the Jin-Au Kong Outstanding PhD Thesis Award at MIT in 2015, and the Dimitris N. Chorafas Foundation Award in 2015.