Reconfigurable and Self-Optimizing Multicore Architectures

Tuesday, April 14, 2009
7:00 PM
Free and open to the public

As industry rides the transistor density growth in multicore processors by providing more and more cores, these will exert increasing levels of pressure on shared system resources. Efficient resource management becomes critical to obtaining high utilization, and eliminating potential bandwidth, latency, and cost barriers in multicore systems. Unfortunately, current hardware policies for microarchitectural resource management are ad hoc at best, and are generally incapable of providing basic functionalities like anticipating the long-term consequences of scheduling decisions (planning), or generalizing from experience obtained through past resource allocation decisions to act successfully in new situations (learning). As a result, current hardware controllers tend to grossly underutilize the (already limited) platform resources available. In this talk, using the problem of memory scheduling as context, I will describe the use of machine learning (ML) technology in designing self-optimizing, adaptive hardware controllers capable of planning, learning, and continuously adapting to changing workload demands. An ML-based design approach allows the hardware designer to focus on what performance target the controller should accomplish and what system variables might be useful to ultimately derive a good control policy, rather than devising a fixed policy that describes exactly how the controller should accomplish that target. This not only eliminates much of the human design effort involved in traditional controller design, but also yields higher performing, more efficient controllers.

This work was completed as part of Engin Ipek's Ph.D. thesis at Cornell's Computer Systems Laboratory. It has been nominated for the 2008 ACM Doctoral Dissertation Award by Cornell University.

x x


Engin Ipek

Computer Architecture group at Microsoft Research