CMOS technology scaling has fueled tremendous progress in electronics and has brought about system-on-chip (SoC) products with a broad impact on our society and economy. Technology scaling is very beneficial to increase the performance and density for digital signal processing, computation and memory. Analog and radio-frequency (RF) circuits remain the critical interfaces to connect the digital cores of SoCs to the physical world and need to satisfy increasing performance demands. At the same time, designing analog and RF functions with scaled devices and reducing supply voltages is getting progressively harder. Meeting more stringent performance requirements with poorer analog devices makes the task of the analog designer very challenging and interesting. We will review scaling challenges for analog circuit performance and contrast them to digital circuit scaling. We will further discuss design paradigms that address analog and RF circuit scaling, including mixed-domain analog techniques. The talk will also touch upon the novel application opportunities that scaled CMOS technologies enable. We will illustrate how exploiting high speed transistors can enable ultra-low power wireless communications for applications such as building an Internet of Things with energy harvesting active networked tags.
Tuesday, April 01, 2014
Free and open to the public