System in Package Technologies and Design Challenges

Seminar
Tuesday, October 19, 2004
7:00 PM
Free and open to the public

SiP is happening for four primary reasons:

  1. cost
  2. form factor
  3. time to market
  4. mixed technologies in a module

Market pressures on electronic products continue to drive reduced form factor, lower cost, longer battery life, and shorter product life cycles. SoC (system-on-chip) design took advantage of higher density process technologies to build systems or sub-systems on a single die. As IC process geometries continue to shrink, it becomes hard to mix specialized memories with high speed digital and analog or RF circuits in a common process. System complexities continue to grow demanding higher level of integrations in design components to simplify printed circuit board design.

SiP is an approach to system design integration using IC packaging technologies as a key technology to solve interconnects issues. It provides systems designer an endless option of mixing old and new technologies - flip-chip, wire-bond and lead-frame packaging techniques, organic, inorganic and silicon substrates to solve today's design issues.

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Speaker

Bill McCaffrey

Chief Architect for System-in-Package
Cadence Design Systems