Tackling Variability Challenges in VLSI Circuits

Friday, January 09, 2015
11:45 AM to 1:00 PM
POB 2.402
Free and open to the public

In this talk, we will discuss variability challenges in VLSI design and our recent research efforts on variation-tolerant design techniques. Variability in circuit delay, chip temperature, and transistor aging have imposed a large amount of pessimistic margins in frequency, voltage, and device size, which has severely undermined gains from various boundary-pushing efforts. We will present (1) a low-overhead, in-situ, within-a-cycle error detection and correction technique that can operate at near/sub-threshold voltage, (2) ultra-compact thermal sensor circuits enabling 10X denser on-chip thermal sensing, (3) self-testing circuits and frameworks for in-field & in-situ aging monitoring in pipeline and SRAM register files. Several test chip measurement results will be presented.

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Mingoo Seok

Mingoo Seok

Assistant Professor
Columbia University

Mingoo Seok is an assistant professor in the Department of Electrical Engineering at Columbia University since 2012. He received the BS (with summa cum laude) in electrical engineering from Seoul National University, South Korea, in 2005, and the MS and PhD degree from University of Michigan in 2007 and 2011, respectively, all in electrical engineering. He has spent about a year as a member of technical staff in the Systems and Applications R&D Center of Texas Instruments, Dallas. His research interests include variation-tolerant and low-power VLSI circuits, ultra-low-power SoC for emerging embedded systems such as biomedical devices, brain-computer interface, and Internet of Things, machine-learning accelerator architecture, and non-conventional computing devices. He received 1999 Distinguished Undergraduate Scholarship from the Korea Foundation for Advanced Studies, 2005 Doctoral Fellowship from the same organization, and 2008 Rackham Pre-Doctoral Fellowship from University of Michigan. He also won 2009 AMD/CICC Scholarship Award for picowatt voltage reference work and 2009 DAC/ISSCC Design Contest for the 35pW sensor platform design (a.k.a. Phoenix Processor). He holds one issued international patent and three pending patents. He has served as an associate editor for IEEE Transaction on Circuits and Systems I.