Supercomputing for the Future, Supercomputing from the Past

Abstract

Supercomputers, which were a long time ago built on technology developed from scratch, are nowadays built from commodity components. On one side, this means that designers of such systems have to closely monitor the evolution of mass market developments. On the other side, supercomputing becomes a driving boost for technology and systems for the future, providing requirements for the performance and design. As fundamental limits in the single processor per chip, in terms of performance/power ratio, are already on the table, multicore chips and massive parallelism have become the trend to achieve the required performance levels. A hierarchical structure, both in hardware and software, is the unavoidable approach build future supercomputing systems. The talk will first address how these systems have been built in the past and how we envisage their design in the near future.

The gap between peak and real performance for current systems will become worst if designers don't adopt a vertical approach, from processor to node and system design (including interconnect), parallel programming models, dynamic resource management to improve load balancing, tools for performance analysis, prediction and optimization, and new numerical methods, algorithms and applications. Research and proposals in this direction will be presented during the talk in the framework of the future 10/100 Petaflops architecture for the Marenostrum site, the Barcelona Supercomputing Center.

Speaker Biography

Professor Valero was born in 1952 in a small town in Aragon, not far from Zarazoga. He obtained his Telecommunication Engineering Degree from the Technical University of Madrid (UPM) in 1974 and his Ph.D. in telecommunications from the Technical University of Catalonia (UPC) in 1980. He has been teaching at UPC since 1974. In 1983, he bacame full professor in the Computer Architecture Department. He has served as Chair of the Computer Architecture Department (1983-84, 1986-87, 1989-90, and 2001-2005) and Dean of Computer Engineering School (1984-85). Today, he is a Full Professor in the Department and has been the founding Director (since its inception in 2004) of the Barcelona Supercomputer Center, a 25 million dollar a year enterprise funded by the governements of Spain and Catalunya.

His research is in the area of computer architecture, with special emphasis on high performance computers: processor organization, memory hierarchy, systolic array processors, interconnection networks, numerical algorithms, compilers, and performance evaluation. He has co-authored over 400 publications: more than 250 in Conference and the rest in Journals and Book Chapters. He has graduated more than 30 PhDs in Computer Architecture, 12 of whom are today full professors at leading engineering departments in Spain.