ELM - Parallel Architectures for Efficient Embedded Computing

Abstract

Embedded systems are ubiquitous, appearing in applications as diverse as mobile phones, digital television, automobiles, communications systems, sensor networks, and medical devices.
Satisfying the demanding computational and efficiency requirements of such systems presently requires the use of complex application- specific integrated circuits (ASICs). Designing ASICs is time consuming and expensive, often involving tasks such as lowering reference implementations from C to equivalent gate-level represen- tations. The significant design and verification efforts required impose large non-recurring engineering costs in the development of new systems, deterring innovation and limiting the viability of new applications.

Programmable processors offer flexibility, improved productivity, and reduced cost. Unfortunately, even low-power embedded processors are inefficient compared to ASICs. The inefficiency arises because programmable processors devote significantly more energy and chip area to delivering instructions and data to functional units. To become viable ASIC replacements, programmable processors must deliver high computational performance with significantly greater efficiency.

In this talk, I will describe ELM, an energy-efficient programmable processor for high-performance embedded applications. ELM is 10x more efficient that conventional embedded processors, and approaches the efficiency of ASICs on compute-intensive tasks. ELM achieves this efficiency by using distributed and hierarchical register and memory organizations that allow software to better exploit parallelism and instruction/data locality in applications. This talk will focus on novel computer architecture, compiler, and circuit techniques used in ELM, and discuss how the systems-based approach used to design ELM can be used to improve the efficiency of embedded systems more broadly.

Speaker Biography

James Balfour is an Electrical Engineering PhD candidate in the Computer Systems Laboratory at Stanford University. He holds a B.ASc. in Electrical and Computer Engineering from Simon Fraser University and an MSEE from Stanford University. He received the Dean's Medal in Applied Science from Simon Fraser University and the Cadence Design Systems Fellowship from Stanford University.