Advanced Modeling and Design of High-Performance ADC-Based Serial Links

Seminar
Friday, April 22, 2016
6:45 AM to 7:45 AM
POB 2.402
Free and open to the public

Improvements in I/O data rates and power consumption are necessary to support the future bandwidth requirements for next-generation datacenters and exa-scale supercomputing. While high-performance I/O circuitry can leverage the technology improvements that enable increased core performance, unfortunately the bandwidth of the electrical channels used for inter-chip communication has not scaled in the same manner. As CMOS technology scaling allows for the efficient implementation of powerful on-chip digital signal processing (DSP) algorithms for equalization and symbol detection, this motivates the use of analog to digital converter (ADC)-based analog front ends in I/O receiver design. Unfortunately, ADC-based receivers are generally more complex and consume higher power. This talk will provide an overview of recent advances in the design and modeling of ADC-based serial links, including discussion on a statistical modeling framework, low-power >10GS/s ADC designs, and novel receiver architectures which leverage partial analog equalization embedded in the ADC.

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Speaker

Samuel Palermo

Associate Professor
Texas A&M University

Samuel Palermo (S’98-M’07) received the B.S. and M.S. degree in electrical engineering from Texas A&M University, College Station, TX in 1997 and 1999, respectively, and the Ph.D. degree in electrical engineering from Stanford University, Stanford, CA in 2007. From 1999 to 2000, he was with Texas Instruments, Dallas, TX, where he worked on the design of mixed-signal integrated circuits for high-speed serial data communication. From 2006 to 2008, he was with Intel Corporation, Hillsboro, OR, where he worked on high-speed optical and electrical I/O architectures. In 2009, he joined the Electrical and Computer Engineering Department of Texas A&M University where he is currently an associate professor. His research interests include high-speed electrical and optical interconnect architectures, high performance clocking circuits, and integrated sensor systems.

Dr. Palermo is a recipient of a 2013 NSF-CAREER award. He is a member of Eta Kappa Nu and IEEE. He has served as an associate editor for IEEE Transactions on Circuits and System – II from 2011 to 2015 and has served on the IEEE CASS Board of Governors from 2011 to 2012. He is currently the General Co-Chair of the IEEE Optical Interconnects Conference. He was a coauthor of the Jack Raper Award for Outstanding Technology-Directions Paper at the 2009 International Solid-State Circuits Conference and the Best Student Paper at the 2014 Midwest Symposium on Circuits and Systems. He received the Texas A&M University Department of Electrical and Computer Engineering Outstanding Professor Award in 2014 and the Engineering Faculty Fellow Award in 2015.