Challenges in Circuits and Systems for Emerging Memory Based Energy-Efficient Intelligent Chips

Friday, December 01, 2017
11:00 AM to 12:00 PM
EER 3.646
Free and open to the public

Memory has become one of the bottlenecks in the development of intelligent computing systems with high bandwidth and low energy consumption. This seminar will address trends in the development of emerging memory, including resistive RAM (ReRAM), STT-MRAM, and phase-change memory (PCM) for intelligent electronics. The fundamental circuits of nonvolatile memory (NVM) and eNVM will be introduced. This seminar will explore the challenges faced by researchers in the circuit designs, circuit-device-interaction, and architecture-circuit interactions for emerging memory. The 2nd part of this seminar will explore the implementation of emerging memory beyond conventional memory applications, such as nonvolatile-logics (nvLogics), nonvolatile processors, and deep learning and artificial intelligent (AI) chips.



Meng-Fan Chang

National Tsing Hua University

Dr. Chang is a full Professor in the Dept. of Electrical Engineering of National Tsing Hua University (NTHU), Taiwan. Since 2011, he has also served as the Associate Executive Director of National Program for Intelligent Electronics (NPIE) in Taiwan. Dr. Change obtained considerable practical experience before joining NTHU in 2006, having spent more than 10 years working in industry.

Between 1997 and 2006, Dr. Chang worked in the development of SRAM/ROM/Flash macros/compilers at Mentor Graphics (New Jersey, US), TSMC (Taiwan), and the Intellectual Property Library Company (Taiwan). His research interests include circuit design for volatile and nonvolatile memory, 3D-Memory, spintronics logics, circuit-device-interactions in non-CMOS devices, computing-in-memory, memristor circuits, and neuromorphic circuits for deep learning and artificial intelligent chips.

Since 2010, Dr. Chang has authored or co-authored more than 50+ conference papers (including 14 ISSCC, 13 VLSI Symposia, 8 IEDM, and 4 DAC) as well as 30+ IEEE journal papers and 40+ US patents. He is an associate editor for IEEE TVLSI, IEEE TCAD and IEICE Electronics. He has been serving on technical program committees for ISSCC, IEDM (Chair of MT sub-committee for 2017), DAC, A-SSCC, IEEE CAS Society (Chair Elect of NG-TC), and numerous international conferences. He is a Distinguished Lecture (DL) speaker for IEEE Circuits and Systems Society (CASS) during 2017-2018. He received numerous awards on research and industrial collaboration from Taiwan government, Academia Sinica of Taiwan, NTHU, Taiwan National Chip Implementation Center (CIC), the Macronix Golden Silicon Awards, and ITRI.