DTC-based digital PLLs

Monday, November 21, 2016
12:00 PM to 1:30 PM
POB 2.402
Free and open to the public

Digitally-intensive phase-locked loops (PLLs) have emerged in recent years as an important alternative to analog PLLs also for fractional-N synthesis in wireless applications where a very demanding spectral purity is required, in particular when scaled CMOS technologies are employed. The main reasons for this success is probably that digital circuits enable powerful calibration techniques, running in background, that allow relaxing the impact of analog impairments. The key block of these topologies is the time to digital converter (TDC), which completely equivalent to an ADC, whose performance (dissipation, resolution and linearity) often influence the overall PLL spectral purity (phase noise and spurs) and power dissipation. An alternative approach employs a one-bit TDC driven by a multi bit digital-to-time converter (DTC) in feedback. By leveraging the cancellation of quantization noise in the digital domain, it is possible to realize a fractional-N synthesizer for wireless specifications with much lower dissipation with respect to the TDC-based solution. In this sense, the DTC-based digital PLL fully typify the digitally-intensive approach. In this lecture, first the basics of digital PLLs for wireless applications will be presented. The focus will then move to the main trade-off, showing how a single-bit TDC allows a significant improvement in term of jitter vs. power trade-off, and how the use of a DTC will enable this solution. Different solutions will be reviewed together with adaptive techniques that improve the DTC linearity with negligible penalty in term of noise and power dissipations. 


Carlo Samori

Politecnico di Milano

Carlo Samori received the Ph.D. in electrical engineering in 1995, at the Politecnico di Milano, Italy, where he is now a professor. His research interests are in the area of RF circuits, in particular of design and analysis of VCOs and high performance frequency synthesizers. He has collaborated with several semiconductor companies. He is a co-author of more than 100 papers and of the book Integrated Frequency Synthesizers for Wireless Systems (Cambridge University Press, 2007). Prof. Samori has been a member of the Technical Program Committee of the IEEE International Solid-State Circuits Conference and he is a member of the European Solid-State Circuits Conference. He has been Guest Editor for the December 2014 issue of the Journal of Solid-State Circuits.