With the rise in global data demands, energy efficiency in electronics has become a defining challenge for sustainable progress in AI, healthcare, IoT, and beyond. Today's electronics, constrained by materials and architectures that separate computing and memory, are nearing their energy and latency limits for data-intensive applications. Emerging approaches, such as neuro-inspired computing and 3D integration of logic and memory devices, offer great promise; realizing these advances, however, requires innovations in materials, transport physics, device engineering, and semiconductor-compatible fabrication.
In this talk, I will discuss how atomic-scale engineering and integration of heterogeneous materials and devices can address these intertwined challenges with an emphasis on three examples from my work (1) electro-thermal and interface engineering in chalcogenide heterostructures enabling low-power memory on both rigid and flexible platforms; (2) exceptional surface transport in non-crystalline semimetal as a paradigm for low-resistance interconnects; and (3) integration of ferroic dielectrics with wide bandgap heterostructures to address fundamental limits in high-electron mobility transistors. I will conclude the talk by sharing my vision for advancing transformative materials and multifunctional nanodevices to drive the future of 3D-integrated, energy-efficient electronics.
Biography
Asir Khan is a postdoctoral researcher at UC Berkeley, working with Prof. Sayeef Salahuddin in the EECS department. Asir received his PhD (2023) and MS in Electrical Engineering from Stanford University, where he was advised by Prof. Eric Pop and awarded the Stanford Graduate Fellowship. Asir’s research focuses on advancing energy-efficient electronics through atomic-scale engineering of heterogeneous materials and nanodevices, addressing fundamental energy limits. His interdisciplinary contributions have been recognized with the IEEE-EDS PhD Fellowship, Materials Research Society (MRS) Gold Graduate Award, and AVS Russell & Sigurd Varian Award. He also received several best paper and presentation awards including at the 2022 IEEE Symposium on VLSI Technology and Circuits, 2022 MRS Fall meeting, 2023 SRC TECHCON and 2023 AVS Symposium. Asir has held research intern positions at TSMC and IBM TJ Watson and currently serves as a Fellow at the Stanford Emerging Technology Review.
