Training and running AI models requires moving huge amounts of data between processors and memory. 3D memory, where memory is stacked vertically instead of horizontally, is one of the foundational technologies enabling today’s breakthroughs in deep learning, large language models and high-performance computing.
Researchers in the Chandra Family Department of Electrical and Computer Engineering at The University of Texas at Austin have demonstrated a breakthrough in transistor design that reduces leakage current in very small geometry transistors by more than a factor of 10. Very low current leakage is a key requirement in these transistors.
The study was conducted by graduate students Chankeun Yoon and Juhan Ahn working with professors Ananth Dodabalapur and Jaydeep Kulkarni, all of Texas ECE.
The nanospike geometry in the electrode design alters the electric field distributions and current flow patterns in a TFT so that it acts as a much better switch that leaks a lot less in the off-state compared to TFTs with a conventional design. The nanospike design removes the need to use dual gates or more complex device geometries.
"This advance is especially promising for technologies like AI accelerators and neuromorphic circuits, where efficient, highly-scaled transistors are critical,” said Dodabalapur.
The paper documents these advantageous characteristics using both Yoon's experimental data from fabricated nanoscale transistors and Ahn's TCAD simulations.
Ananth Dodabalapur received his Ph.D. degree in Electrical Engineering from The University of Texas at Austin in 1990. Between 1990 and 2001 he was with Bell Laboratories, Murray Hill, NJ. He has published more than 250 articles in refereed journals which have resulted in an H Index of 97 (Google Scholar), and has 27 issued US patents. Since September 2001, he is with The University of Texas at Austin and holds the Motorola Regents Chair in Engineering. His present research includes organic and inorganic thin-film transistors and optoelectronic devices. He is a Fellow of IEEE and NAI. He was the founding Editor-in-Chief of Flexible and Printed Electronics.
Jaydeep Kulkarni is an associate professor and holds the Fellow of Silicon Laboratories Endowed Chair in Electrical Engineering in the Chandra Family Department of Electrical and Computer Engineering at The University of Texas at Austin. He has filed 40 patents, published 2 book chapters, and over 150 papers in refereed journals and conferences. His research focuses on machine learning hardware accelerators, in-memory computing, emerging nanodevices, heterogeneous and 3D integrated circuits, hardware security, and cryogenic computing. This research has garnered recognition through the NSF Career Award, SRC Innovation Award, Intel Rising Star Faculty Award, AMD Faculty Fellowship, Micron Foundation Faculty Awards, and funding support from various organizations, including DARPA, NSF, SRC, DOE, DoD, several national laboratories, and industry partners.
Juhan Ahn is a Ph.D. student supervised by Prof. Jaydeep Kulkarni. He joined Texas ECE in Fall 2021.
Chankeun Yoon is a Ph.D. student supervised by Prof. Ananth Dodabalapur. He joined Texas ECE in Fall 2021.
