Jaydeep Kulkarni

Jaydeep Kulkarni

AMD Development Chair
Assistant Professor

Announcement:  Research assistantships for graduate students in the areas of Integrated circuits and emerging nano-technologies. Students with devices/circuits coursework and test-chip design experience are encouraged to contact me. 

Bio: Jaydeep Kulkarni is an Assistant Professor in Electrical and Computer Engineering at the University of Texas at Austin.

Dr. Kulkarni received the Bachelor of Engineering (B.E.) degree from the University of Pune, India in 2002, the Master of Technology (M. Tech.) degree from the Indian Institute of Science (IISc) Bangalore, India in 2004 and Ph.D. degree from Purdue University, West Lafayette, IN, in 2009 all in electrical engineering. During 2004-05, he was with Cypress Semiconductors, Bangalore and designed I/O circuits for micro-power SRAMs. During 2009-2017, he worked as a Senior Staff Research Scientist at Intel’s Circuit Research Lab (CRL), Hillsboro, OR. In August 2017, he joined the University of Texas at Austin as an assistant professor in electrical and computer engineering department. He has filed 30 patents, published 2 book chapters, and 60 papers in referred journals and conferences. His research is focused on energy efficient logic and memory circuits, power management circuits, emerging nanotechnology applications, and alternative computing models. 

Dr. Kulkarni received 2004 best graduate student award from IISc Bangalore, two Semiconductor Research Corporation's (SRC) inventor recognition awards, 2008 ISLPED design contest award, 2008 Intel foundation Ph.D. fellowship award, 2008 SRC TECHCON best paper in session award, 2010 Purdue school of ECE outstanding doctoral dissertation award, four Intel patent recognition awards, seven Intel divisional recognition awards for successful technology transfers, 2015 IEEE Transactions on VLSI systems best paper award, and 2015 SRC outstanding industrial liaison award. He has participated in technical program committees of A-SSCC, ISLPED, ISCAS, and ASQED conferences. During his tenure at Intel Labs, he served as an industrial distinguished lecturer for IEEE Circuits and Systems Society and as an industrial liaison for SRC, NSF, Stanford System-X alliance, Stanford-NMTRI, and STARnet research programs. Currently, he is serving as a general chair for 2018 ISLPED, an associate editor for IEEE Solid State Circuit Letters, and IEEE Transactions on VLSI Systems. He is a senior member of IEEE.

 

 

Research Interests: 

Integrated Circuits
Emerging Nano-technologies

Office: 

EER 4.882

Phone: 

512-471-4802